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Realization of 2D systolic array-based neural network accelerator in FPGA - title
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Süstoolsel maatriksil põhineva närvivõrgu kiirendi realisatsioon FPGAs. Realization of 2D systolic array-based neural network accelerator in FPGA
Budovey,Nikita
07.06.2023
bachelor's theses
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