title
Fault Simulation and Code Coverage Analysis of RTL Designs Using High-Level Decision Diagrams
Rikete simuleerimine ja koodikatte analüüs register-siirde tasemel kasutades kõrgtaseme otsustusdiagramme
series
Informatics and System Engineering C
Informaatika ja süsteemitehnika C
author
Reinsalu, Uljana
keywords
fault simulation
code coverage
metrics
decisiondiagrams
high-level decision diagrams
dissertations
dissertatsioonid
publisher
TUT Press
TTÜ Kirjastus
supervisor
Ellervee, Peeter
Raik, Jaan
Sudnitsõn, Aleksander
defence date
12.06.2013
identifier
ISBN 9789949234769 (publication)
ISBN 9789949234776 (pdf)
ISSN 14064731
language
eng
institution
Tallinn University of Technology
Tallinna Tehnikaülikool
faculty
Faculty of Information Technology
Infotehnoloogia teaduskond
department / college
Department of Computer Engineering
Arvutitehnika instituut